PXN20RM Datasheet, PDF (843/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Enhanced Modular Input/Output Subsystem (eMIOS200)
• An output disable input selector, which selects the output disable input signal to be used as output
disable
IIB
RCB
ipd_done
ipd_req
uc_int_flag
Unified Channel
Clock
Prescaler
Programmable
Filter
RWCB
ips_wdata[31:0]
biu_channel_en[n]
biu_a_en
biu_b_en
biu_cnt_en
biu_control_en
biu_status_en
uc_rd_data[31:0]
ips_byte[7:0]
ips_byte[15:8]
ips_byte[23:16]
ips_byte[31:24]
ips_rwb
ips_addr[29:27]
channel_controller
Match Logic
Mode Logic
Control Signals
Counter Bus
channel_datapath
uc_cnt_rd_data[n]
Comparator A
Comparator B
emios_counter_bus[0]
emios_counter_bus[1]
uc_cnt_rd_data[n]
Figure 28-13. Unified Channel Block Diagram
Figure 28-14 shows the unified channel control block diagram.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
28-21