PXN20RM Datasheet, PDF (1373/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Memory Map
Table A-5. e200z6 Core SPR Numbers (Supervisor Mode) (continued)
Register
IVOR33
IVOR34
MSR
PVR
PIR
SVR
HID0
HID1
TBL
TBU
TCR
TSR
DEC
DECAR
DBCR0
DBCR1
DBCR2
DBCR3
DBSR
DBCNT
IAC1
IAC2
IAC3
IAC4
DAC1
DAC2
MAS0
MAS1
MAS2
Description
Interrupt Vector Offset Register 33
Interrupt Vector Offset Register 34
Processor Control Registers
Machine State Register
Processor Version Register
Processor ID Register
System Version Register
Hardware Implementation Dependent Register 0
Hardware Implementation Dependent Register 1
Timer Registers
Time Base Lower Register
Time Base Upper Register
Timer Control Register
Timer Status Register
Decrementer Register
Decrementer Auto-reload Register
Debug Registers
Debug Control Register 0
Debug Control Register 1
Debug Control Register 2
Debug Control Register 3
Debug Status Register
Debug Counter Register
Instruction Address Compare Register 1
Instruction Address Compare Register 2
Instruction Address Compare Register 3
Instruction Address Compare Register 4
Data Address Compare Register 1
Data Address Compare Register 2
Memory Management Registers
MMU Assist Register 0
MMU Assist Register 1
MMU Assist Register 2r
SPR (decimal)
529
530
N/A
287
286
1023
1008
1009
284
285
340
336
22
54
308
309
310
561
304
562
312
313
314
315
316
317
624
625
626
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
A-115