PXN20RM Datasheet, PDF (1010/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Enhanced Serial Communication Interface (eSCI)
31.4 Functional Description
This section provides a complete functional description of the eSCI block, detailing the operation of the
design from the end user perspective in a number of subsections.
31.4.1 Module Control
The operational mode of the module is controlled by the MDIS bit in the eSCI Control Register 2
(eSCI_CR2). The module can transmit and receive data when it is enabled, i.e., MDIS = 1.
31.4.2 Frame Formats
The eSCI module uses the standard NRZ mark/space data format. The eSCI supports three basic frame
types, which are the data frames, break characters, and idle characters.
31.4.2.1 Data Frame Formats
Each data frame contains a character that is surrounded by a start bit, an optional parity or address bit, and
one or two stop bits. The supported data frame formats for transmission and reception are specified in
Table 31-15. The supported data frame formats for reception only are specified in Table 31-16.
Table 31-15. Supported Data Frame Formats for RX and TX
Control
Frame Content
eSCI_CR3
eSCI_CR1
Payload Bits
M2
M
PE
WAKE
Start
Bits
Character Address
Bits
Bits¹
Parity
Bits
Stop
Bits
LIN byte fields (Figure 31-15)
0
0
0
0
1
8
0
0
1
SCI frames (8 payload bits)(Figure 31-16)
0
0
0
0
1
8
0
0
1
0
0
0
1
1
7
1
0
1
0
0
1
0
1
7
0
1
1
SCI frames (9 payload bits) (Figure 31-17)
0
1
0
0
1
9
0
0
1
0
1
0
1
1
8
1
0
1
0
1
1
0
1
8
0
1
1
1 _{The address bit identifies the frame as an address character. See Section 31.4.5.5, Multiprocessor}
Communication.
31-20
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor