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PXN20RM Datasheet, PDF (710/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller
FlexRay Communication Controller (FlexRAY)
Table 26-90. Transmit Message Buffer Slot Status Structure Field Descriptions (continued)
Field
SEA
CEA
BVA
TCA
Description
Syntax Error on Channel A — protocol related variable: vSS!SyntaxError channel A.
0 vSS!SyntaxError = 0.
1 vSS!SyntaxError = 1.
Content Error on Channel A — protocol related variable: vSS!ContentError channel A.
0 vSS!ContentError = 0.
1 vSS!ContentError = 1.
Boundary Violation on Channel A — protocol related variable: vSS!BViolation channel A.
0 vSS!BViolation = 0.
1 vSS!BViolation = 1.
Transmission Conflict on Channel A — protocol related variable: vSS!TxConflict channel A.
0 vSS!TxConflict = 0.
1 vSS!TxConflict = 1.
26.6.5.3 Message Buffer Data Field Description
The message buffer data field is used to store the frame payload data, or a part of it, of the frame to be
transmitted to or received from the FlexRay bus. The minimum required length of this field depends on
the message buffer type that the physical message buffer is assigned to and is given in Table 26-91. The
structure of the message buffer data field is given in Figure 26-118.
Table 26-91. Message Buffer Data Field Minimum Length
physical message buffer
assigned to
minimum length defined by
Individual Message Buffer in Segment 1
Receive Shadow Buffer in Segment 1
Individual Message Buffer in Segment 2
Receive Shadow Buffer in Segment 2
Receive FIFO for channel A
Receive FIFO for channel B
MBDSR[MBSEG1DS]
MBDSR[MBSEG1DS]
MBDSR[MBSEG2DS]
MBDSR[MBSEG2DS]
RFDSR[ENTRY_SIZE] (RFSR[SEL] = 0)
RFDSR[ENTRY_SIZE] (RFSR[SEL] = 1)
NOTE
The controller will not access any locations outside the message buffer data
field boundaries given by Table 26-91.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0x0
DATA0 / MID0 / NMV0
DATA1 / MID1 / NMV1
0x2
DATA2 / NMV2
DATA3 / NMV3
...
...
...
0xN-2
DATA N-2
DATA N-1
Figure 26-118. Message Buffer Data Field Structure
The message buffer data field is located in the FlexRay memory; thus, the controller has no means to
control application write access to the field. To ensure data consistency, the application must follow a write
and read access scheme.
26-96
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor