PXN20RM Datasheet, PDF (489/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Chapter 21
System Timer Module (STM)
21.1 Overview
The System Timer Module (STM) is a 32-bit timer designed to support commonly required system and
application software timing functions. The STM includes a 32-bit up counter and four 32-bit compare
channels with a separate interrupt source for each channel. The counter is driven by the system clock
divided by an 8-bit prescale value (1 to 256).
21.1.1 Features
The STM has the following features:
• One 32-bit up counter with 8-bit prescaler
• Four 32-bit compare channels
• Independent interrupt source for each channel
• Counter can be stopped in debug mode
21.1.2 Modes of Operation
The STM supports two device modes of operation: normal and debug. When the STM is enabled in normal
mode, its counter runs continuously. In debug mode, operation of the counter is controlled by the FRZ bit
in the STM_CR. If the FRZ bit is set, the counter is stopped in debug mode, otherwise it continues to run.
21.1.3 Clocking
The STM is clocked by the system clock. It can be frozen during debug by asserting the FREEZE signal.
21.1.4 Interrupts
The STM has four independent interrupt sources that are connected to the interrupt controller.
21.2 External Signal Description
The STM does not have any external interface signals.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
21-1