PXN20RM Datasheet, PDF (366/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

e200z6 Core (Z6)
OnCE/NEXUS 1/
NEXUS 3
Control Logic
CPU
Control Logic
Signal
Processing
Engine
(SPE APU)
Memory
Management
Unit
Unified
Cache
32 KB
64
SPR
LR
CR
CTR
XER
GPRs
(64-bit)
Control
Instruction Unit
Instruction Buffer
Address
Data In
64
Data Out
64
PC Branch
Unit
Unit
Load/
Store
Unit
Bus Interface Unit
Integer
Execution
Unit
Multiply
Unit
32
64
Address
Data
Control
Figure 13-1. e200z6 Block Diagram
13.1.2 Overview
The e200z6 core integrates the following:
• Integer execution unit
• Branch control unit
• Instruction fetch and load/store units
• Multi-ported register file capable of sustaining three read and two write operations per clock.
13-2
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor