PXN20RM Datasheet, PDF (878/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Enhanced Modular Input/Output Subsystem (eMIOS200)
write to A1
Selected Counter Bus ^{and B2}
0x0011FF
0x001000
0x000700
0x000500
0x000400
0x000000
Match A1
Match A2
write to B2
Match B1 _{Match A2}
Match A1
Output Flip-Flop
FLAG Pin/Register
A1 Value¹
0x000400
B1 Value
B2 Value²
0xxxxxxx 0x001000
0x001000
A2 Value 0x000500
Notes: 1. EMIOS_CADR[n] = A1
2. EMIOS_CBDR[n] = B2 for write, B1 for read
0x000700
0x000700
Match B1
Time
Figure 28-52. OPWMT Example{statement}
Figure 28-53 shows the Unified Channel running in OPWMT mode with Trigger Event Generation and
0% duty cycle.
write to A1
Selected Counter Bus ^{and B2}
0x0011FF
0x001000
Match A1
Match A2
write to B2
Match B1
Match A1
Match B1
Match A2
0x000500
0x000400
0x000000
Output Flip-Flop
FLAG Pin/Register
A1 Value1
0x000400
B1 Value
B2 Value2
0xxxxxxx 0x001000
0x001000
A2 Value 0x000500
Notes: 1. EMIOS_CADR[n] = A1
2. EMIOS_CBDR[n] = B2 for write, B1 for read
0x000400
0x000400
Figure 28-53. OPWMT with 0% Duty Cycle
Time
Figure 28-54 shows the Unified Channel running in OPWMT mode with Trigger Event Generation and
100% duty cycle.
28-56
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor