PXN20RM Datasheet, PDF (814/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Media Local Bus (MLB)
27.5.3 Initialize Channel
InitChan(n)
Determine channel direction
CECRn[TR]
Determinechannel type
CECRn[CT[1:0]]
Determine isochronous flow control
mechanism CECRn[FSE]
Determine isochronouspacket length
CECRn[IPL[7:0]]
Isochronous
yes
channel?
no
Determine IO/DMA mode
CECRn[26]
Determine interrupt mask
CECRn[15:8]
Determine channel address
CECRn[CA[8:1]]
Write data to CECRn
at PBI address 0x10 + 4 * n
InitDmaBuffer(n)
ReturnDmaBuffer
For DMA Mode (ping-pong buffering), the
interrupt mask bits could be set as follows:
4: 0 – Sync RX/TX
1 Control RX/TX, Async RX/TX
3: 0 – All channel types/directions
2: 0 – All channel types/directions
1: 1 – All channel types/directions
0: 1 – All channel types/directions
For DMA Mode (circular buffering), the
interrupt mask bits could be set as follows:
4: 0 – Sync RX/TX
3: 1 – Synchronous only
2: 1 – Synchronous only
1: 0 – Synchronous only
0: 0 – Synchronous only
ReturnInitChan
Figure 27-25. Initialize Channel
27-42
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor