PXN20RM Datasheet, PDF (62/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Introduction
1.7.28 Nexus Development Interface (NDI)
The NDI module is compliant with the IEEE-ISTO 5001-2003 standard. The following features are
implemented, but only available on the 256 MAPBGA emulation package:
• 17-bit full duplex pin interface for medium and high visibility throughput
— Full port mode (12 MDO)
— Auxiliary input port (MCKO, 12xMDO, 2xMSEO, EVTO, EVTI)
— Auxiliary output port
— 5 pin JTAG port (JCOMP, TDI, TDO, TMS and TCK)
The NPC block performs the following functions
• Controls arbitration between e200Z6 and e200Z0 Nexus modules to the Nexus Auxiliary output
port
• Generates full port mode indication output port
• Generates MCKO and frequency division (1/2, 1/4, 1/8).
• Controls sharing of EVTO/EVTI
• Enables gating of MCKO when the auxiliary output port is idle.
e200Z6 development support features (Nexus class3)
• IEEE-ISTO 5001-2003 standard class 3 compliant
• Program trace via branch trace messaging (BTM)
• Data trace via data write messaging (DWM) and data read messaging (DRM). This allows the
development tools to trace reads and /or writes to selected internal memory resources
• Ownership via ownership trace messaging (OTM). OTM facilitates ownership trace by providing
visibility of which process ID or operating system task is activated
• Run-time access to the e200Z6 memory map via the JTAG port
• Watchpoint messaging
• Watchpoint trigger enable of program and/or data trace messaging
e200Z0 development support features (Nexus class 2+)
• IEEE-ISTO 5001-2003 standard class 2 compliant with additional class 3 and 4 features available
• Program trace via branch trace messaging (BTM)
• Ownership via ownership trace messaging (OTM)
— OTM facilitates ownership trace by providing visibility of which process ID or operating
system task is activated
• Run-time access to the e200Z6 memory map via the JTAG port
• Watchpoint messaging
• Watchpoint trigger enable of program and/or data trace messaging
Capability of an event output signal from either core to generate a debug request in the other core
• All Nexus port pins operate at 3.3 V levels
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PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor