PXN20RM Datasheet, PDF (485/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Software Watchdog Timer (SWT)
Table 20-7. SWT_CO Register Field Descriptions
Field
Description
CNT
Watchdog Count. When the watchdog is disabled (SWT_CR[WEN] = 0) this field shows the value of the internal
down counter. When the watchdog is enabled the value of this field is 0x0000_0000. Values in this field can lag
behind the internal counter value for as many as 6 system plus 8 counter clock cycles. Therefore, the value read from
this field immediately after disabling the watchdog may be higher than the actual value of the internal counter.
20.3.2.7 SWT Service Key Register (SWT_SK)
The SWT Service Key (SWT_SK) register holds the previous (or initial) service key value. This register
is read-only if either the SWT_CR[HLK] or SWT_CR[SLK] bits are set.
Offset: SWT_BASE + 0x0018
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
SK
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 20-7. SWT Service Register (SWT_SR)
Table 20-8. SWT_SR Field Descriptions
Field
Description
SK Service Key.This field is the previous (or initial) service key value used in keyed service mode. If SWT_CR[KEY] is
set, the next key value to be written to the SWT_SR is (17*SK+3) mod 2¹⁶.
20.4 Functional Description
The SWT is a 32-bit timer designed to enable the system to recover in situations such as software getting
trapped in a loop or if a bus transaction fails to terminate. It includes a a control register (SWT_CR), an
interrupt register (SWT_IR), time-out register (SWT_TO), a window register (SWT_WN), a service
register (SWT_SR), a counter output register (SWT_CO), and a service key register (SWT_SK).
The SWT_CR includes bits to enable the timer, set configuration options, and lock configuration of the
module. The watchdog is enabled by setting the SWT_CR[WEN] bit. The reset value of the
SWT_CR[WEN] bit is 1. Since the reset value of this bit is 1, the watchdog starts operation automatically
after reset is released. Some devices can be configured to clear this bit automatically during the boot
process.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
20-7