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PXN20RM Datasheet, PDF (58/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller | |||
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Introduction
1.7.19 Interrupt Controller (INTC)
The PXN20 implements an interrupt controller that features the following:
⢠Unique 9-bit vector for each of the 316 separate interrupt sources (22 reserved)
⢠8 software triggerable interrupt sources
⢠16 priority levels with fixed hardware arbitration within priority levels for each interrupt source
⢠Ability to modify the ISR or task priority.
â Modifying the priority can be used to implement the priority ceiling protocol for accessing
shared resources.
⢠External high priority interrupt directly accessing the main core critical interrupt mechanism
⢠Interrupt steering between main CPU and IOP
â Independent selection of any interrupt source to be routed through IOP
â Interrupts share same priority level between IOP and CPU
1.7.20 System Clocks and Clock Generation
The following list summarizes the system clock and clock generation on the PXN20:
⢠System clock can be derived from the following sources
â 4â40 MHz XTAL
â FMPLL
â 16 MHz IRC oscillator
⢠Programmable output clock divider of system clock (ï¸1, ï¸2, ï¸4, ï¸ï¸ï¬ï ï¸ï±ï¶)
⢠Separate programmable peripheral bus clock divider ratio (ï¸1, ï¸2, ï¸4, ï¸ï¸) applied to system clock
⢠Frequency Modulated Phase-locked loop (FMPLL)
â Input clock frequency from 4 MHz to 40 MHz
â Clock source from external oscillator
â Lock detect circuitry continuously monitors lock status
â Loss of clock (LOC) detection for reference and feedback clocks
â On-chip loop filter (for improved electromagnetic interference performance and reduces
number of external components required)
⢠On-chip crystal oscillatorsupporting 4 MHz to 40 MHz crystals
⢠Dedicated 16 MHz internal RC oscillator
â 16 MHz internal RC oscillator supports low speed code execution and clocking of peripherals
through selection as the system clock
â Used as default clock source out of reset
â Provides a clock for rapid start-up from low power modes
â Provides a clock for Software Watchdog Timer (SWT)
â Provides a back-up clock in the event of PLL or external oscillator clock failure
â 5% accuracy over the operating temperature range (after factory trim)
1-16
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
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