PXN20RM Datasheet, PDF (1024/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Enhanced Serial Communication Interface (eSCI)
RECEIVER
RXD
TRANSMITTER
TXD
Figure 31-29. Single Wire Mode
The TXDIR bit (eSCI_CR2[1]) determines whether the TXD pin is going to be used as an input
(TXDIR = 0) or an output (TXDIR = 1) in this mode of operation.
31.4.5.3.5 Loop Mode
In loop mode, the input of the receiver is driven by the output of the transmitter. The RXD pin is
disconnected from the eSCI module.
RECEIVER
RXD
TRANSMITTER
TXD
Figure 31-30. Loop Mode
31.4.5.3.6 Frame and Character Reception
The receiver is started when it is in ready or wakeup state and on the selected receiver input (see
Section 31.4.5.3.2, Receiver Input Mode Selection) an active signal is sampled. The receiver enters the run
or wakeup state. The received bits are recovered by the bit sampling described in Section 31.4.5.3.13, Bit
Sampling. During the reception, the received bits are shifted into the internal shift register.
31.4.5.3.7 Break Character Detection
The receiver does not provide any means to detect the reception of a break character. Instead, break
characters are processed as data frames. Due to the received 0 at the stop bit location, the reception of a
break character causes at least a framing error. The error reporting is performed as described in
Section 31.4.5.4, Reception Error Reporting.
31.4.5.3.8 Idle Character Detection
The start point of the idle character detection is controlled by the idle line type bit ILT in the eSCI Control
Register 1 (eSCI_CR1).
If the ILT bit is 0, the idle character detection starts always immediately after the reception of a bit with
the value 0. In this mode, a data frame with a payload section of all ones is erroneously detected as an idle
character.
31-34
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor