SH7727 Datasheet, PDF (984/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 30 PC Card Controller (PCC)
30.3.3 Usage Notes
External Bus Frequency Limit when Using PC Card: According to the PC card standard, the
attribute memory access time is specified as 600 ns (3.3 V)/300 ns (5 V). Therefore, when the
SH7727 accesses attribute memory, the bus cycle must be coordinated with the PC card interface
timing. In the SH7727, the timing can be adjusted by setting the TED and TEH values in the PCR
register, and the number of waits and number of idle states in the WCR1 and WCR2 registers,
allowing a PC card to be used within the above frequency ranges.
The common memory access time and I/O access time (based on the IORD and IOWR signals) are
also similarly specified (see table below), and a PC card must be used within the above ranges in
order to satisfy all these specifications.
PC Card Space
Access Time (5 V Operation)
Attribute memory
300 ns
Common memory
250 ns
I/O space
165 ns
(–IORD/–IOWR pulse width)
Access Time (3.3 V Operation)
600 ns
600 ns
165 ns
Pin Function Control and Card Type Switching: When setting pin function controller pin
functions to dedicated PC card use ("other function"), the disabled state should first be set in the
card status change interrupt enable register (PCC0CSCIER). Also, the card status change register
(PCC0CSCR) must be cleared after the setting has been made. However, this restriction does not
apply to the card detection pins (CD1, CD2).
When changing the card type bit (P0PCCT) in the area 6 general control register (PCC0GCR), the
disabled state should first be set in the card status change interrupt enable register
(PCC0CSCIER). Also, the card status change register (PCC0CSCR) must be cleared after the
setting has been made.
Reason: When PC card controller settings are modified, the functions of PC card pins that
generate various interrupts change, with the result that unnecessary interrupts may be
generated.
Rev. 5.00 Dec 12, 2005 page 912 of 1034
REJ09B0254-0500