SH7727 Datasheet, PDF (326/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 9 Power-Down Modes and Software Reset
9.7 Hardware Standby Mode
9.7.1 Transition to Hardware Standby Mode
To enter hardware standby mode, set the CA pin low. In hardware standby mode, all modules
except for any modules that run with RTC clock are halted as well as in standby mode entered by
sleep instruction.
Differences between hardware standby mode and standby mode are as follows.
1. Interrupts and manual reset are not accepted in hardware standby mode.
2. The TMU does not run in hardware standby mode.
Operation when the CA pin goes low depends on the CPG status.
1. In standby mode
The chip enters hardware standby mode, clock remains halted.
Interrupts and manual reset are not accepted and the TMU halts.
2. During WDT runs when clearing standby mode with an interrupt
The chip enters hardware standby mode after the CPU resumes operation once standby mode is
cleared.
3. In sleep mode
The chip enters hardware standby mode after the CPU resumes operation once sleep mode is
cleared.
Note that CA pin must keep low during hardware standby mode.
9.7.2 Clearing the Hardware Standby Mode
Hardware standby mode can be cleared only by power-on reset.
The clock starts oscillation by setting CA pin high while RESETP pin is low. At this time, keep
the RESETP pin low until the clock oscillation settles. Then, the CPU starts power-on reset
processing after setting the RESETP pin high.
The operation is not guaranteed when an interrupt or manual reset is occurred.
Rev. 5.00 Dec 12, 2005 page 254 of 1034
REJ09B0254-0500