SH7727 Datasheet, PDF (499/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 14 Direct Memory Access Controller (DMAC)
14.3.6 Source Address Reload Function
Channel 2 includes a reload function, in which the value set in the source address register (SAR2)
is restored every four transfers when the RO bit in CHCR2 is set to 1. This function cannot be
used with the 16-byte transfer. Figure 14.24 shows this operation. Figure 14.25 shows a timing
chart of the source address reload function with the following conditions: burst mode, auto
request, 16-bit transfer data size, SAR2 count-up, DAR2 fixed, reload function on, and usage of
only channel 2.
DMAC
DMAC control
Transfer
request
Reload control
4 time
count
RO bit = 1
CHCR2
Count signal
DMATCR2
Reload signal
Reload
signal
SAR2
(initial value)
SAR2
Figure 14.24 Source Address Reload Function Diagram
Rev. 5.00 Dec 12, 2005 page 427 of 1034
REJ09B0254-0500