SH7727 Datasheet, PDF (594/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 17 Serial Communication Interface (SCI)
again receive data with the multiprocessor bit set to 1. Multiple processors can send and receive
data in this way.
Figure 17.12 shows an example of communication among processors using the multiprocessor
format.
Transmitting
station
Receiving
station A
(ID = 01)
Serial communications circuit
Receiving
station B
(ID = 02)
Receiving
station C
(ID = 03)
Receiving
station D
(ID = 04)
Serial
data
H'01
(MPB = 1)
H'AA
(MPB = 0)
ID transmit cycle =
specifies receiving station
Data transmit cycle =
data transmission to
receiving station specified
by ID
MPB: Multiprocessor bit
Figure 17.12 Example of Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A)
Communication Formats
Four formats are available. Parity-bit settings are ignored when the multiprocessor format is
selected. For details see table 17.11.
Clock
See the description in the asynchronous mode section.
Rev. 5.00 Dec 12, 2005 page 522 of 1034
REJ09B0254-0500