SH7727 Datasheet, PDF (17/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

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16.3.2 Setting the Time
Figure 16.2 shows how to set the time after stopping the clock. This procedure is available to set
the entire calendar and clock function. This procedure can be programmed easily.
Stop clock,
Write 1 to RESET and 0 to
reset divider circuit START in the RCR2 register
Set seconds, minutes,
hour, day, day of the Order is irrelevant
week, month and year
Start clock
Write 1 to START in the
RCR2 register
Reset the divider circuits (RTC prescaler and R64CNT) and set the counter.
Figure 16.2 Setting the Time
Revised Version
Figures 16.2 (a) and 16.2 (b) show how to set the time after stopping the clock. This procedure can
be used to set the entire calendar and clock function. It can be programmed easily.
Usage Notes
1. Initialization Timing for 64 Hz Counter (R64CNT)
If it is necessary, after initializing the counter by means of the RESET bit in the RTC’s RCR2
register, to confirm that the change has taken effect by reading the R64CNT value, wait at least
107 µs after setting the RESET bit to 1 before reading the R64CNT counter. Note that the
divider circuit (RTC prescaler) is also initialized when the RESET bit is set to 1.
2. Incrementing RSECCNT by Initializing R64CNT
Either method (a) or method (b) below may be used.
(a) After setting the RESET bit to 1 and confirming that R64CNT has been initialized, set the
START bit to 1. This process is shown in figure 16.2 (a).
(b) Set the START bit to 1 and the RESET bit to 1 at the same time. This process is shown in
figure 16.2 (b). Note that the processing indicated by the asterisk (*) in figure 16.2 (b) may
be omitted if nothing is written to the RCR2 register during an interval of approximately
107 µs after the START bit is set to 1.
Confirm R64CNT is not 0
Stop clock
Reset divider circuit
Write 1 to RESET and
0 to START in the RCR2 register
Set seconds, minutes,
hour, day, day of the
week, month and year
Order is irrelevant
Confirm R64CNT is 0
Yes
Start clock
No
Write 1 to START in the RCR2 register
Figure 16.2(a) Setting the Time
* ^{Confirm R64CNT is not 0}
Stop clock
Reset divider circuit
Set seconds, minutes,
hour, day, day of the
week, month and year
Start clock
Reset divider circuit
Write 1 to RESET and
0 to START in the RCR2 register
Order is irrelevant
Write 1 to RESET and
1 to START in the RCR2 register
*
Confirm R64CNT is 0
No
Yes
*
Write to RCR2
481
484
497
17.1.2 Block Diagram
SCI pin I/O and data control is performed
by bits 11 to 8 of SCPCR and bits 5 and 4
of SCPDR. …
Figure 16.2(b) Setting the Time
SCI pin I/O and data control is performed
by bits 3 to 0 of SCPCR and bits 1 and 0 of
SCPDR. …
Table 17.2 Registers
H'A888
H'8008
17.2.8 Port SC Control Register
(SCPCR)/Port SC Date Register (SCPDR)
SCPCR
Bit: 15 14 13 12 11 10 9
8
7
6
SCP7 SCP7 SCP6 SCP6 SCP5 SCP5 SCP4 SCP4 SCP3 SCP3
MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0
Initial value: 1
0
1
0
1
0
0
0
1
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
SCPCR
Bit: 15 14 13 12 11 10 9
8
7
6
SCP7 SCP7 SCP6 SCP6 SCP5 SCP5 SCP4 SCP4 SCP3 SCP3
MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0
Initial value: 1
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Rev. 5.00 Dec 12, 2005 page xvii of lxxii