SH7727 Datasheet, PDF (608/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 17 Serial Communication Interface (SCI)
Transfer direction
Synchronization
clock
Serial
data
Bit 7 Bit 0
RDRF
Bit 7 Bit 0 Bit 1
Bit 6 Bit 7
ORER
RXI interrupt
request
generated
Reads data with
the RXI interrupt
processing routine
and clears RDRF
bit to 0
RXI interrupt
request
generated
1 frame
ERI interrupt
request generated
by overrun error
Figure 17.22 Example of SCI Operation in Reception
Transmitting and Receiving Serial Data Simultaneously (Clock Synchronous Mode)
Figure 17.23 shows a sample flowchart for simultaneous serial transmit and receive operations.
After enabling the SCI transmission/reception, provide simultaneous serial transmit and receive
operations following the procedure shown below:
Rev. 5.00 Dec 12, 2005 page 536 of 1034
REJ09B0254-0500