SH7727 Datasheet, PDF (119/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 2 CPU
Addressing
Mode
PC-relative
Instruction
Format
disp:8
Effective Address Calculation Method
Effective address is PC with 8-bit displacement
disp added after being sign-extended and
multiplied by 2.
Calculation
Formula
PC + disp × 2
PC
disp
+
(sign-extended)
×
PC + disp × 2
disp:12
2
Effective address is PC with 12-bit displacement PC + disp × 2
disp added after being sign-extended and
multiplied by 2.
PC
disp
+
(sign-extended)
×
PC + disp × 2
2
Rn
Effective address is sum of PC and Rn.
PC + Rn
PC
+
PC + Rn
Immediate #imm:8
#imm:8
#imm:8
Rn
8-bit immediate data imm of TST, AND, OR,
—
or XOR instruction is zero-extended.
8-bit immediate data imm of MOV, ADD, or
—
CMP/EQ instruction is sign-extended.
8-bit immediate data imm of TRAPA instruction —
is zero-extended and multiplied by 4.
Rev. 5.00 Dec 12, 2005 page 47 of 1034
REJ09B0254-0500