SH7727 Datasheet, PDF (662/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 19 Serial Communication Interface with FIFO (SCIF)
Table 19.7 Settings for SCSMR2 and SCSCR2 and Selection of Clock Source of SCIF
Mode
Asynchronous
SCSCR2 Settings
Bit 1
CKE1
Bit 0
CKE0
0
0
1
1
0
1
SCIF Transmit/Receive Clock
Clock Source
Internal
External
Functions of SCK2 Pins
SCIF does not use SCK2 pins.
Inhibited
Inhibited
19.3.2 Serial Operation
Transmit/Receive Formats: Table 19.8 lists eight communication formats that can be selected.
The format is selected by settings in the serial mode register (SCSMR2).
Table 19.8 Serial Transmit/Receive Formats
SCSMR2 Bits
CHR PE STOP
Serial Transmit/Receive Format and Frame Length
1 2345678 9
10 11 12
0 00
START
8-Bit data
STOP
0 01
START
8-Bit data
STOP STOP
0 10
START
8-Bit data
P STOP
0 11
START
8-Bit data
P STOP STOP
1 00
START
7-Bit data
STOP
1 01
START
7-Bit data
STOP STOP
1 10
START
7-Bit data
P STOP
1 11
START
Notes: START:
STOP:
P:
Start bit
Stop bit
Parity bit
7-Bit data
P STOP STOP
Rev. 5.00 Dec 12, 2005 page 590 of 1034
REJ09B0254-0500