SH7727 Datasheet, PDF (124/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 2 CPU
31
R8[Ix]
+2
+0
31 16 15
0
R4[Ax]
R5[Ax]
ALU
Instruction (MOVX/MOVY)
0 DMX DMY
CONT
31 16 15
R6[Ay]
R7[Ay]
15
1
MS
CMP
0
31
AU
0
R9[Iy]
+2
+0
ABx
15
1
XAB
ME
15
1
ABy
15
1
YAB
Figure 2.14 Modulo Addressing
An example of modulo addressing is given below.
MS = H'7008; ME=H'700C; R4=H'A5007008;
DMX = 1; DMY = 0:
(Modulo addressing setting for address register Ax (R4, R5))
As a result of the above settings, the R4 register changes as follows.
Inc.
Inc.
Inc.
R4: H'A5007008
R4: H'A500700A
R4: H'A500700C
R4: H'A5007008 (Reaches modulo end address, so becomes modulo start address)
Place the data so that the upper 16 bits of the modulo start and end addresses are the same. This is
because the modulo start address overwrites only the lower 15 bits of the address register,
excluding bit 0.
Note:
When addition indexing is used for DSP data addressing, the address pointer may exceed
the ME value without actually reaching it. In this case, the address pointer will not return
to the modulo start address. Not only with modulo addressing, but when X and Y data
addressing is used, bit 0 is ignored. 0 must always be written to bit 0 of the address
pointer, index register, MS, and ME.
Rev. 5.00 Dec 12, 2005 page 52 of 1034
REJ09B0254-0500