SH7727 Datasheet, PDF (710/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 20 Serial IO (SIOF)
(2) Control by Secondary FS
This is the method that CODEC, which outputs SIOFSYNC as a sync. pulse (FS), transmit or
receive the control data by outputting the secondary FS used for transmit or receive for only
control data after the period of 1/2 frame, which is different from the original FS output position.
Order of the control data interface as secondary FS are listed below.
• Normal data are sent as LSB=0 (compulsory is 0 by SIOF)
• Transmit data of LSB=1 at transmitting the control data
(For 1 by SIOF reading to SITCR register)
• CODEC transmits secondary FS
• SIOF synchronizes secondary FS and transmit or receive (storing into SIRCR register) the
control data (setting data in SITCR register)
Figure 20.8 shows timing of control data interface by secondary FS.
1/2 frame
1 frame
1/2 frame
SCK_SIO
SIOFSYN
TXD_SIO
RXD_SIO
Normal FS
Secondary FS
Lch.DATA
Slot No.0
Control ch.0
Slot No.0
LSB = "1”" (secondary FS request)
Normal FS
Setting: TRMD = 01, REDG = 0,
TDLE = 1, TDLA3 to TDLA0 = 0000,
RDLE = 1, RDLA3 to RDLA0 = 0000,
CD0E = 1, CD0A3 to CD0A0 = 0000,
FL = 1100 (frame length 28 bits)
TDRE = 0, TDRA3 to TDRA0 = 0000,
RDRE = 0, RDRA3 to RDRA0 = 0000,
CD1E = 0, CD1A3 to CD1A0 = 0000
Figure 20.8 Control Data Interface (Secondary FS)
Rev. 5.00 Dec 12, 2005 page 638 of 1034
REJ09B0254-0500