SH7727 Datasheet, PDF (257/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 7 Interrupt Controller (INTC)
7.3.5 Interrupt Control Register 3 (ICR3)
The ICR3 is a 16-bit read/write register that sets the mask to PC Card controller. This register is
initialized to H'0000 at power-on reset or manual reset, but is not initialized in standby mode.
Bit:
Initial value:
R/W:
15
—
0
R/W
14
13
12
11
10
9
8
PC0SWIM PC0IRIM PC0SCIM PC0CDIM PC0RCIM PC0BWIM PC0BDIM
0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit 15—Reserved: This bit is always read as 0. The write value should always be 0.
Bit 14—PC0SWIM: PC Card controller0 SWI mask.
Bit 14:
PC0SWIM
0
1
Description
Interrupt requests is masked
Interrupt requests is not masked
(Initial value)
Bit 13—PC0IRIM: PC Card controller0 IRI mask.
Bits 13:
PC0IRIM
0
1
Description
Interrupt requests is masked
Interrupt requests is not masked
(Initial value)
Bit 12—PC0SCIM: PC Card controller0 SCI mask.
Bit 12:
PC0SCIM
0
1
Description
Interrupt requests is masked
Interrupt requests is not masked
(Initial value)
Rev. 5.00 Dec 12, 2005 page 185 of 1034
REJ09B0254-0500