English
Language : 

SH7727 Datasheet, PDF (930/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series
Section 28 A/D Converter
28.1.2 Block Diagram
Figure 28.1 shows a block diagram of the A/D converter.
Peripheral data bus
Internal
data bus
AVCC
AVSS
10-bit
D/A
AN2
AN3
AN4
AN5
AN6
AN7
+
Analog
multi-
plexer
–
Comparator
Sample-and-
hold circuit
Control circuit
ADTRG
A/D converter
Legend:
ADCR: A/D control register
ADCSR: A/D control/status register
ADDRA: A/D data register A
ADDRB: A/D data register B
ADDRC: A/D data register C
ADDRD: A/D data register D
Figure 28.1 A/D Converter Block Diagram
Rev. 5.00 Dec 12, 2005 page 858 of 1034
REJ09B0254-0500
φ/8
φ/16
ADI
interrupt
signal