SH7727 Datasheet, PDF (617/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 18 Smart Card Interface
18.1.3 Pin Configuration
Table 18.1 summarizes the smart card interface pins.
Table 18.1 SCI Pins
Pin Name
Serial clock pin
Receive data pin
Transmit data pin
Abbreviation
SCK0
RxD0
TxD0
I/O
Output
Input
Output
Function
Clock output
Receive data input
Transmit data output
18.1.4 Register Configuration
Table 18.2 summarizes the registers used by the smart card interface. The SCSMR, SCBRR,
SCSCR, SCTDR, and SCRDR registers are the same as in the ordinary SCI function. They are
described in section 17, Serial Communication Interface (SCI).
Table 18.2 Registers
Name
Abbreviation R/W Initial Value^*3 Address
Serial mode register
SCSMR
R/W H'00
H'FFFFFE80
Bit rate register
SCBRR
R/W H'FF
H'FFFFFE82
Serial control register
SCSCR
R/W H'00
H'FFFFFE84
Transmit data register
Serial status register
SCTDR
SCSSR
R/W H'FF
R/(W)^*1 H'84
H'FFFFFE86
H'FFFFFE88
Receive data register
SCRDR
Smart card mode register SCSCMR
R
R/W
H'00
*²
H'FFFFFE8A
H'FFFFFE8C
Notes: 1. Only 0 can be written, to clear the flags.
2. Bits 0, 2, and 3 are cleared. The value of the other bits is undefined.
3. Initialized by a power-on or manual reset.
Access Size
8
8
8
8
8
8
8
Rev. 5.00 Dec 12, 2005 page 545 of 1034
REJ09B0254-0500