SH7727 Datasheet, PDF (636/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 18 Smart Card Interface
Retransmission by the SCI in Transmit Mode: Figure 18.10 shows the retransmission operation
in the SCI transmit mode.
1. After transmission of one frame is completed, the FER/ERS bit in SCSSR is set to 1 when a
error signal is returned from the receiving side. If the RIE bit in SCSCR is enabled at this time,
an ERI interrupt is requested. Be sure to clear the FER/ERS bit before the next parity bit is
sampled.
2. The TEND bit in SCSSR is not set in the frame that received the error signal that indicated the
error.
3. The FER/ERS bit in SCSSR is not set when no error signal is returned from the receiving side.
4. When no error signal is returned from the receiving side, the TEND bit in SCSSR is set to 1
when the transmission of the frame that includes the retransmission is considered completed. If
the TIE bit in SCSCR is enabled at this time, a TXI interrupt will be requested.
nth transfer frame
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
Retransmitted frame
Transfer frame n + 1
(DE)
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
Ds D0 D1 D2 D3 D4
TDRE
Transfer from SCTDR
TEND
to SCTSR
FER/ERS
Transfer from
SCTDR to SCTSR
2
1
Transfer from
SCTDR to SCTSR
4
3
Figure 18.10 Retransmission in SCI Transmit Mode
Rev. 5.00 Dec 12, 2005 page 564 of 1034
REJ09B0254-0500