SH7727 Datasheet, PDF (572/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 17 Serial Communication Interface (SCI)
SCPDR Bit 1—Serial Clock Port Data (SCP1DT): Specifies the serial port SCK0 pin I/O data.
Input or output is specified by the SCP1MD0 and SCP1MD1 bits. In output mode, the value of
the SCP1DT bit is output from the SCK0 pin.
Bit 1:
SCP1DT
0
1
Description
I/O data is low
I/O data is high
(Initial value)
SCPCR Bits 1 and 0—Serial Port Break I/O (SCP0MD1, SCP0MD0): These bits specify the
serial port TxD0 pin output condition. When the TxD0 pin is actually used as a port output pin
and outputs the value set with the SCP0DT bit, clear the TE bit of SCSCR to 0.
Bit 1:
SCP0MD1
0
0
Bit 0:
SCP0MD0
0
1
Description
SCP0DT bit value is not output to TxD0 pin
SCP0DT bit value is output to TxD0 pin
(Initial value)
SCPDR Bit 0—Serial Port Break Data (SCP0DT): Specifies the serial port RxD0 pin input data
and TxD0 pin output data. The TxD0 pin output condition is specified by the SCP0MD0 and
SCP0MD1 bits. When the TxD0 pin is set to output mode, the value of the SCP0DT bit is output
to the TxD0 pin. The RxD0 pin value is read from the SCP0DT bit regardless of the values of the
SCP0MD0 and SCP0MD1 bits, if RE in the SCSCR is set to 1. The initial value of this bit after a
power-on reset is undefined.
Bit 0:
SCP0DT
0
1
Description
I/O data is low
I/O data is high
(Initial value)
Block diagrams of the SCI I/O ports are shown in figures 17.2 to 17.4.
17.2.9 Bit Rate Register (SCBRR)
Bit:
7
6
5
4
3
2
1
0
Initial value:
1
1
1
1
1
1
1
1
R/W: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Rev. 5.00 Dec 12, 2005 page 500 of 1034
REJ09B0254-0500