SH7727 Datasheet, PDF (938/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 28 A/D Converter
Upper byte read
CPU
(H'AA)
Bus
interface
Module internal data bus
TEMP
(H'40)
Lower byte read
CPU
(H'40)
Upper byte of Lower byte of
A/D data register A/D data register
[H'AA]
[H'40]
Bus
interface
Module internal data bus
TEMP
(H'40)
Upper byte of Lower byte of
A/D data register A/D data register
[H'AA]
[H'40]
Figure 28.2 A/D Data Register Access Operation (Reading H'AA40)
Rev. 5.00 Dec 12, 2005 page 866 of 1034
REJ09B0254-0500