SH7727 Datasheet, PDF (858/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 25 LCD Controller
Hsync signal
H total time
Hsync Back Left
time porch border
H addressable video
Right Front
border porch
Vsync time
Back porch
Top border
V addressable
video
Bottom border
Front porch
Active video = top/left border + addressable video + bottom/right border
Total H blank = Hsync time + back porch + front porch
Total V blank = Vsync time + back porch + front porch
HTCN = H total time
HDCN = H addressable video
HSYNP = H addressable video + right border + front porch
HSYNW = Hsync time
VTLN = V total time
CDLN = V addressable video
VSYNP = V addressable video + bottom border + front porch
VSYNW = Vsync time
Figure 25.2 Valid Display and Retrace Period
25.2.17 LCDC Power Management Mode Register (LDPMMR)
LDPMMR controls the power supply circuit that provides power to the LCD module. The usage
of two types of power-supply control pins, VCPWC and VEPWC, and turning on or off the power
supply are selected.
Bit: 15
14
13
12
11
10
9
8
7
6
5
4
3
ONC3 ONC2 ONC1 ONC0 OFFD3 OFFD2 OFFD1 OFFD0 — VCPE VEPE DONE —
Initial value: 0
0
0
0
0
0
0
0
0
0
0
1
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
R
R/W R/W R/W
R
2
1
0
— LPS1 LPS0
0
0
0
R
R
R
Rev. 5.00 Dec 12, 2005 page 786 of 1034
REJ09B0254-0500