SH7727 Datasheet, PDF (120/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 2 CPU
2.4.2 DSP Data Addressing
Two different memory accesses are made with DSP instructions. The two kinds of instructions are
X and Y data transfer instructions (MOVX.W, MOVY.W) and single data transfer instructions
(MOVS.W, MOVSL). The data addressing is different for these two kinds of instruction. An
overview of the data transfer instructions is given in table 2.13.
Table 2.13 Overview of Data Transfer Instructions
Address register
Index register
Addressing
Modulo addressing
Data bus
Data length
Bus contention
Memory
Source register
X/Y Data Transfer Processing
(MOVX.W, MOVY.W)
Ax: R4, R5, Ay: R6, R7
Ix: R8, Iy: R9
Nop/Inc (+2)/index addition:
post-increment
—
Possible
XDB, YDB
16 bits (word)
No
X/Y data memory
Dx, Dy: A0, A1
Destination register
Dx: X0/X1, Dy: Y0/Y1
Single Data Transfer Processing
(MOVS.W, MOVS.L)
As: R2, R3, R4, R5
Is: R8
Nop/Inc (+2, +4)/index addition:
post-increment
Dec (–2, –4): pre-decrement
Not possible
LDB
16/32 bits (word/longword)
Yes
Entire memory space
Ds: A0/A1, M0/M1, X0/X1, Y0/Y1,
A0G, A1G
Ds: A0/A1, M0/M1, X0/X1, Y0/Y1,
A0G, A1G
X/Y Data Addressing: With DSP instructions, the X and Y data memory can be accessed
simultaneously using the MOVX.W and MOVY.W instructions. Two address pointers are
provided for DSP instructions to enable simultaneous access to X and Y data memory. Only
pointer addressing can be used with DSP instructions; immediate addressing is not available.
Address registers are divided into two, with register R4 or R5 functioning as the X memory
address register (Ax), and register R6 or R7 as the Y memory address register (Ay). The following
three kinds of addressing can be used with X and Y data transfer instructions.
1. Non-update address register addressing:
The Ax and Ay registers are address pointers. They are not updated.
Rev. 5.00 Dec 12, 2005 page 48 of 1034
REJ09B0254-0500