SH7727 Datasheet, PDF (582/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 17 Serial Communication Interface (SCI)
Table 17.9 Serial Mode Register Settings and SCI Communication Formats
SCSMR Settings
Bit 7 Bit 6 Bit 5 Bit 2 Bit 3
C/A CHR PE MP STOP
0
0
0
0
0
1
1
0
1
1
0
0
1
1
0
1
0
*
1
0
*
1
1
*
0
*
1
1
*
*
*
*
Note: * Don’t care.
Mode
Asynchronous
Asynchronous
(multiprocessor
format)
Clock
synchronous
SCI Communication Format
Data Parity Multipro- Stop Bit
Length Bit
cessor Bit Length
8-bit
Not set Not set 1 bit
2 bits
Set
1 bit
2 bits
7-bit
Not set
1 bit
2 bits
Set
1 bit
2 bits
8-bit
Not set Set
1 bit
2 bits
7-bit
1 bit
2 bits
8-bit
Not set None
Table 17.10 SCSMR and SCSCR Settings and SCI Clock Source Selection
SCSMR
Bit 7
C/A
0
1
SCSCR Settings
Bit 1 Bit 0
CKE1 CKE0 Mode
0
0
Asynchronous
1
mode
1
0
1
0
0
Clock
1
synchronous
mode
1
0
1
SCI Transmit/Receive Clock
Clock
Source
SCK0
Pin Function
Internal
SCI does not use the SCK0 pin
Outputs a clock with frequency
matching the bit rate
External
Inputs a clock with frequency 16
times the bit rate
Internal
Outputs the synchronous clock
External
Inputs the synchronous clock
Rev. 5.00 Dec 12, 2005 page 510 of 1034
REJ09B0254-0500