SH7727 Datasheet, PDF(905/1109 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

SH7727 Datasheet, PDF (905/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

◁

Section 26 Pin Function Controller (PFC)

26.3.7 Port G Control Register (PGCR)

For details on using versions previous to the SH7727B please refer to appendix F, Specifications

for Using Port G Control Register (PGCR) with Versions Previous to the SH7727B.

Bit: 15 14 13

PG7 PG7 ï£§

MD1 MD0

Initial value: 1 0 1

R/W: R/W R/W R

12 11 10 9 8 7 6 5 4 3 2 1 0

ï£§ PG5 PG5 PG4 PG4 PG3 PG3 PG2 PG2 PG1 PG1 PG0 PG0

MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0

0 1/0 0 1 0 1/0 0 1/0 0 1/0 0 1/0 0

R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W

Port G Control Register (PGCR) is a 16-bit read/write register that selects the pin functions.

PGCR is initialized to H'AAAA (ASEMD0 = 1) or H'A200 (ASEMD0 = 0) by power-on resets;

however, it is not initialized by manual resets, in standby mode, or in sleep mode.

Bits 15, 14: PG7 Mode 1, 0 (PG7MD1, PG7MD0)

Bits 13, 12: Reserved

Bits 11, 10: PG5 Mode 1, 0 (PG5MD1, PG5MD0)

Bits 9, 8: PG4 Mode 1, 0 (PG4MD1, PG4MD0)

Bits 7, 6: PG3 Mode 1, 0 (PG3MD1, PG3MD0)

Bits 5, 4: PG2 Mode 1, 0 (PG2MD1, PG2MD0)

Bits 3, 2: PG1 Mode 1, 0 (PG1MD1, PG1MD0)

Bits 1, 0: PG0 Mode 1, 0 (PG0MD1, PG0MD0)

These bits select the pin functions and the input pullup MOS control.

Rev. 5.00 Dec 12, 2005 page 833 of 1034

REJ09B0254-0500

▷