SH7727 Datasheet, PDF (268/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 7 Interrupt Controller (INTC)
Bit 3—ERI Interrupt Request (ERI): Indicates whether a ERI (SIOF) interrupt request is
generated.
Bit 3: ERI
0
1
Description
ERI interrupt request is not generated
ERI interrupt request is generated
(Initial value)
Bit 2—TXI Interrupt Request (TXI): Indicates whether a TXI (SIOF) interrupt request is
generated.
Bit 2:TXI
0
1
Description
TXI interrupt request is not generated
TXI interrupt request is generated
(Initial value)
Bit 1—RXI Interrupt Request (RXI): Indicates whether a RXI (SIOF) interrupt request is
generated.
Bit 1: RXI
0
1
Description
RXI interrupt request is not generated
RXI interrupt request is generated
(Initial value)
Bit 0—CCI Interrupt Request (CCI): Indicates whether a CCI (CCI) interrupt request is
generated.
Bit 0: CCI
0
1
Description
CCI interrupt request is not generated
CCI interrupt request is generated
(Initial value)
Rev. 5.00 Dec 12, 2005 page 196 of 1034
REJ09B0254-0500