SH7727 Datasheet, PDF (1057/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 32 Electrical Characteristics
SCK_SIO
(input)
t_FSS
t_FSH
t_SICYC
t_SWHI
t_SWLI
SIOFSYNC
(input)
t_STDD
t_STDD
TXD_SIO
t_SRDS t_SRDH
RXD_SIO
Figure 32.57 SIOF Transmit/Receive Timing (Slave Mode 1 and Slave Mode 2)
32.3.12 USB Module Signal Timing
Table 32.15 USB Module Signal Timing
Conditions: V_CCQ = 2.6 to 3.6 V, V_CC = 1.60 to 2.05 V, AV_CC = 3.3 ± 0.3 V, T_a = –20 to 75°C
Item
UCLK external input clock
frequency (48 MHz)
Clock rise time
Clock fall time
Symbol
tFREQ
tR48
tF48
Min
47.9
—
—
Max
48.1
6
6
Unit
MHz
ns
ns
Figure
32.58
t_FREQ
UCLK (input)
t_HIGH
t_LOW
90%
10%
t_R48
t_F48
Figure 32.58 USB Clock Timing
Rev. 5.00 Dec 12, 2005 page 985 of 1034
REJ09B0254-0500