SH7727 Datasheet, PDF (328/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 9 Power-Down Modes and Software Reset
CKIO, CKIO2^*6
CA
RESETP
STATUS
Standby
Normal^*3 Standby^*2 *7
Reset^*1
WDT operation
0−10Bcyc^*4
2 Rcyc or more^*5
Notes: 1. Reset: HH (STATUS1 is high, STATUS0 is high)
2. Standby: LH (STATUS1 is low, STATUS0 is high)
3. Normal: LL (STATUS1 is low, STATUS0 is low)
4. Bcyc: Bus clock cycle
5. Rcyc: EXTAL2 (32.768 kHz) clock cycle
6. CKIO2 can be used at only clock modes 0,1 and 2.
7. Undefined
Figure 9.11 Hardware Standby Mode Timing
(CA = Low during WDT Operation while Standby Mode is Cleared)
Rev. 5.00 Dec 12, 2005 page 256 of 1034
REJ09B0254-0500