SH7727 Datasheet, PDF (51/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

31.2.2 Block Diagram ..................................................................................................... 916
31.3 Register Descriptions ........................................................................................................ 916
31.3.1 Bypass Register (SDBPR) ................................................................................... 917
31.3.2 Instruction Register (SDIR) ................................................................................. 917
31.3.3 Boundary-Scan Register (SDBSR) ...................................................................... 918
31.4 H-UDI Operations............................................................................................................. 925
31.4.1 TAP Controller .................................................................................................... 925
31.4.2 Reset Configuration ............................................................................................. 926
31.4.3 H-UDI Reset ........................................................................................................ 927
31.4.4 H-UDI Interrupt ................................................................................................... 927
31.4.5 Bypass.................................................................................................................. 927
31.4.6 Using H-UDI to Recover from Sleep Mode........................................................ 927
31.5 Usage Notes ...................................................................................................................... 928
31.6 Advanced User Debugger (AUD) ..................................................................................... 928
Section 32 Electrical Characteristics.............................................................................. 929
32.1 Absolute Maximum Ratings ............................................................................................. 929
32.2 DC Characteristics ............................................................................................................ 931
32.3 AC Characteristics ............................................................................................................ 934
32.3.1 Clock Timing ....................................................................................................... 937
32.3.2 Control Signal Timing ......................................................................................... 946
32.3.3 AC Bus Timing .................................................................................................... 949
32.3.4 Basic Timing........................................................................................................ 951
32.3.5 Burst ROM Timing .............................................................................................. 954
32.3.6 Synchronous DRAM Timing ............................................................................... 957
32.3.7 PCMCIA Timing ................................................................................................. 968
32.3.8 Peripheral Module Signal Timing........................................................................ 975
32.3.9 H-UDI-Related Pin Timing.................................................................................. 978
32.3.10 LCDC Timing ...................................................................................................... 980
32.3.11 SIOF Module Signal Timing................................................................................ 982
32.3.12 USB Module Signal Timing ................................................................................ 985
32.3.13 AFEIF Module Signal Timing ............................................................................. 987
32.3.14 AC Characteristics Measurement Conditions ...................................................... 989
32.3.15 Delay Time Variation Due to Load Capacitance ................................................. 990
32.4 A/D Converter Characteristics .......................................................................................... 991
32.5 D/A Converter Characteristics .......................................................................................... 991
Appendix A Pin Functions................................................................................................ 993
A.1 Pin Functions .................................................................................................................... 993
A.2 Treatment of Unused Pins................................................................................................. 999
A.3 Pin Status when Accessing Address Spaces.................................................................... 1004
Rev. 5.00 Dec 12, 2005 page li of lxxii