SH7727 Datasheet, PDF (365/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

12.2 BSC Registers
Section 12 Bus State Controller (BSC)
12.2.1 Bus Control Register 1 (BCR1)
Bus control register 1 (BCR1) is a 16-bit read/write register that sets the functions and bus cycle
state for each area. It is initialized to H'0000 by a power-on reset, but is not initialized by a manual
reset or by standby mode. Do not access external memory outside area 0 until BCR1 register
initialization is complete.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PULA PULD HIZ HIZ ENDI A0 A0 A5 A5 A6 A6 DRAM DRAM DRAM A5 A6
MEM CNT AN BST1 BST0 BST1 BST0 BST1 BST0 TP2 TP1 TP0 PCM PCM
Initial value: 0
0
0
0 0/1* 0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Note: * Samples the value of the external pin (MD5) designating endian at power-on reset.
Bit 15—Pins A25 to A0 Pull-Up (PULA): Specifies whether or not pins A25 to A0 are pulled up
for 4 cycles immediately after BACK is asserted.
Bit 15: PULA
0
1
Description
Not pulled up
Pulled up
(Initial value)
Bit 14—Pins D31 to D0 Pull-Up (PULD): Specifies whether or not pins D31 to D0 are pulled up
when not in use.
Bit 14: PULD
0
1
Description
Not pulled up (Initial value)
Pulled up
Bit 13—Hi-Z memory control (HIZMEM): Specifies the state of A25 to A0, BS, CS, RD/WR,
WE/DQM, RD, CE2A, CE2B and DRAK0 in standby mode.
Bit 13: HIZMEM
0
1
Description
High-impedance state in standby mode.
High in standby mode.
(Initial value)
Rev. 5.00 Dec 12, 2005 page 293 of 1034
REJ09B0254-0500