SH7727 Datasheet, PDF (872/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 25 LCD Controller
5. Packed 2bpp (Pixel Alignment in Byte is Little Endian)
Address
+00
+01
+02
+03
…
MSB
76
P03
P07
54
P02
P06
…
32
P01
P05
LSB
1 0 [Bit]
P00 (Byte0)
P04 (Byte1)
+LAO+00 P13
P12
P11
P10
+LAO+01 P17
P16
P15
P14
+LAO+02
…
+LAO+03
…
Display Memory
6. Packed 4bpp (Pixel Alignment in Byte is Little Endian)
MSB
LSB
Address
7 6 5 4 3 2 1 0 [Bit]
+00
P01
P00
(Byte0)
+01
P04
P03
(Byte1)
+02
P06
P05
(Byte2)
+03
…
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
P11
P10
P13
P12
P15
P14
…
Display Memory
7. Unpacked 4bpp [Windows CE Recommended Format]
MSB
LSB
Address
7 6 5 4 3 2 1 0 [Bit]
+00
P00
(Byte0)
+01
P01
(Byte1)
+02
P02
(Byte2)
+03
…
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
P10
P11
P12
…
Display Memory
8. Unpacked 5bpp [Windows CE Recommended Format]
Address
+00
+01
+02
+03
…
MSB
76
54
…
32
P00
P01
P02
LSB
1 0 [Bit]
(Byte0)
(Byte1)
(Byte2)
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
P10
P11
P12
…
Display Memory
Rev. 5.00 Dec 12, 2005 page 800 of 1034
REJ09B0254-0500
↓ Top Left Pixel
P00 P01 P02 P03 P04 P05 P06 P07 ^…
P10 P11 P12 P13 P14 P15 P16 P17 ^…
…
…
Display
Pn = Pn[1:0]: Put 2bit data
LAO: Line Address Offset
Unused bits should be 0
↓ Top Left Pixel
P00 P01 P02 P03 P04 P05 P06 P07 ^…
P10 P11 P12 P13 P14 P15 P16 P17 ^…
…
…
Display
Pn = Pn[3:0]: Put 4bit data
LAO: Line Address Offset
Unused bits should be 0
↓ Top Left Pixel
P00 P01 P02 P03 P04 P05 P06 P07 ^…
P10 P11 P12 P13 P14 P15 P16 P17 ^…
…
…
Display
Pn = Pn[3:0]: Put 4bit data
LAO: Line Address Offset
Unused bits should be 0
↓ Top Left Pixel
P00 P01 P02 P03 P04 P05 P06 P07 ^…
P10 P11 P12 P13 P14 P15 P16 P17 ^…
…
…
Display
Pn = Pn[4:0]: Put 5bit data
LAO: Line Address Offset
Unused bits should be 0