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| SH7727 Datasheet, PDF (1043/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series | |||
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Section 32 Electrical Characteristics
Tpcm0 Tpcm1 Tpcm1w Tpcm1w Tpcm1w Tpcm2 Tpcm1 Tpcm1w Tpcm2 Tpcm2w
CKIO
tAD
A25 to A4
tAD
A3 to A0
tCSD1
CExx
tRWD
RD/WR
tRSD
RD
(read)
D15 to D0
(read)
BS
tBSD tBSD
tDAKD1
tAD
tAD
tAD
tCSD1
tRWD
tRSD tRSD
tRSD
tRDS1
tRDH1
tRDS1
tRDH1
tBSD tBSD
tDAKD1
DACKn
WAIT
tWTS tWTH
tWTS tWTH
tWTS tWTH
Note: Even though burst mode is set, the write cycle operation is the same as in normal mode.
Figure 32.37 PCMCIA Memory Bus Cycle
(Burst Read, TED = 1, TEH = 1, Two Waits, Burst Pitch = 3, WAITSEL = 1)
Rev. 5.00 Dec 12, 2005 page 971 of 1034
REJ09B0254-0500
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