SH7727 Datasheet, PDF (704/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 20 Serial IO (SIOF)
(2) Transmit or Receive Timing
Timing to SCK_SIO for transmitting TXD_SIO or receiving RXD_SIO can be chosen from the
following two cases. Timing for transmitting or receiving is set into REDG bit in SIMDR register.
In slave mode 1 or slave mode 2, only the sample at falling is valid.
• Sample at falling
• Sample at rising
Figure 20.4 shows the timing for transmitting or receiving.
(a) Falling sampling
SCK_SIO
SIOFSYN
TXD_SIO
RXD_SIO
(b) Rising sampling
Receive timing
Transmit timing
SCK_SIO
SIOFSYN
TXD_SIO
RXD_SIO
Figure 20.4 SIOF Transmit or Receive Timing
Receive timing
Transmit timing
20.3.3 Transmit Data Format
SIOF transmit two kind of data shown below.
• Transmit or receive data: Transmit data of 8 bit/16 bit/16 bit stereo
• Control data: 16 bit length (interface by using the dedicated register)
(1) Transmit Mode
SIOF has four modes as transmit mode shown in table 20.4. Transmit mode is set to bits TRMD1
to TRMD0 in SIMDR register.
Table 20.4 Serial Transmit Mode
Transmit Mode
Slave mode 1
Slave mode 2
Master mode 1
Master mode 2
SIOFSYNC
Sync pulse
Sync pulse
Sync pulse
L/R
Bit Delay
1 bit
1 bit
1 bit
Nothing
Control Data
Slot position
Secondary FS
Slot Position
No support
Rev. 5.00 Dec 12, 2005 page 632 of 1034
REJ09B0254-0500