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SH7727 Datasheet, PDF (854/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series | |||
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Section 25 LCD Controller
25.2.13 LCDC Vertical Total Line Number Register (LDVTLNR)
LDVTLNR specifies the LCD panel's entire vertical size including the vertical retrace period.
Bit: 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
â
â
â
â
â VTLN VTLN VTLN VTLN VTLN VTLN VTLN VTLN VTLN VTLN VTLN
10
9
8
7
6
5
4
3
2
1
0
Initial value: 0
0
0
0
0
0
0
1
1
1
0
1
1
1
1
1
R/W: R
R
R
R
R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bits 15 to 11âReserved
Bits 10 to 0âVertical Total Line Number (VTLN): Set the total number of vertical display
lines (unit: line).
Subtract 1 from the setting (1 to 2047 (H'7FF)).
The minimum for the total number of vertical lines is 2 lines. The following conditions must be
satisfied: VTLN >= VDLN, VTLN >= 1
Example: For an 480-line LCD module and a vertical retrace period of 0 lines
VTLN = (480 + 0) â 1 = 479 = H'1DF
Rev. 5.00 Dec 12, 2005 page 782 of 1034
REJ09B0254-0500
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