SH7727 Datasheet, PDF (869/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 25 LCD Controller
Image for Display
in Memory
(X-Resolution ×
Y-Resolution)
LCD Module
(X-Resolution ×
Y-Resolution)
Number of Colors
for Display
Number
of Column
Address Bits
of SDRAM
Burst Length of LCDC
(LDSMR*)
64 × 128
128 × 64 Monochrome 1 bpp
8 bits
—
9 bits
—
10 bits
—
2 bpp
8 bits
—
9 bits
—
10 bits
—
4 bpp
(packed)
8 bits
9 bits
Not more than 16 bursts
—
10 bits
—
4 bpp
(unpacked)
8 bits
9 bits
Not more than 8 bursts
Not more than 16 bursts
10 bits
—
6 bpp
8 bits
Not more than 8 bursts
9 bits
Not more than 16 bursts
10 bits
—
Color
4 bpp
(packed)
8 bits
9 bits
Not more than 16 bursts
—
10 bits
—
4 bpp
(unpacked)
8 bits
9 bits
Not more than 8 bursts
Not more than 16 bursts
10 bits
—
8 bpp
8 bits
Not more than 8 bursts
9 bits
Not more than 16 bursts
10 bits
—
Note: * Specify the data of the number of line specified as burst length can be stored in address of
SDRAM same as that of ROW.
25.3.3 Color Palette Specification
Color Palette Register: This LCDC has a color palette which outputs 24 bits of data per entry and
is able to simultaneously hold 256 entries. The color palette thus allows the simultaneous display
of 256 colors chosen from among 16-M colors.
The below procedure may be used to set up color palettes at any time.
Rev. 5.00 Dec 12, 2005 page 797 of 1034
REJ09B0254-0500