SH7727 Datasheet, PDF (60/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Figure 21.7 DAA Block Diagram.............................................................................................. 675
Figure 21.8 Ringing Detect Sequence ....................................................................................... 676
Section 22 USB Pin Multiplex Controller
Figure 22.1 Block Diagram of USB PIN Multiplexer ............................................................... 680
Figure 22.2 Example 1 of Transceiver Connection for USB function Controller
(On-chip transceiver is used).................................................................................. 684
Figure 22.3 Example 2 of Transceiver Connection for USB function Controller
(On-chip transceiver is used).................................................................................. 685
Figure 22.4 Example 3 of Transceiver Connection for USB function Controller
(On-chip transceiver is not used)............................................................................ 686
Figure 22.5 Example 4 of Transceiver Connection for USB function Controller
(On-chip transceiver is not used)............................................................................ 687
Figure 22.6 Example 1 of Transceiver Connection for USB Host Controller
(On-chip transceiver is used).................................................................................. 689
Figure 22.7 Example 2 of Transceiver Connection for USB Host Controller
(On-chip transceiver is not used)............................................................................ 690
Section 23 USB Function Controller
Figure 23.1 Block Diagram of UBC.......................................................................................... 692
Figure 23.2 Cable Connection Operation .................................................................................. 704
Figure 23.3 Cable Disconnection Operation.............................................................................. 705
Figure 23.4 Transfer Stage for Control Transfer ....................................................................... 706
Figure 23.5 Setup Stage Operation ............................................................................................ 707
Figure 23.6 Data Stage Operation (Control-In) ......................................................................... 708
Figure 23.7 Data Stage Operation (Control-Out)....................................................................... 710
Figure 23.8 Status Stage Operation (Control-In) ....................................................................... 711
Figure 23.9 Status Stage Operation (Control-Out) .................................................................... 712
Figure 23.10 EP1 Bulk-Out Transfer Operation.......................................................................... 713
Figure 23.11 EP2 Bulk-In Transfer Operation ............................................................................ 714
Figure 23.12 EP2 Interrupt-In Transfer Operation ...................................................................... 716
Figure 23.13 Forcible Stall by Application.................................................................................. 719
Figure 23.14 Automatic Stall by USB Function Module............................................................. 721
Figure 23.15 TR Interrupt Flag Set Timing ................................................................................. 723
Section 25 LCD Controller
Figure 25.1 Block Diagram ....................................................................................................... 764
Figure 25.2 Valid Display and Retrace Period .......................................................................... 786
Figure 25.3 Color-Palette Data Format...................................................................................... 798
Figure 25.4 Power-Supply Control Sequence and States of the LCD Module .......................... 803
Figure 25.5 Power-Supply Control Sequence and States of the LCD Module .......................... 803
Rev. 5.00 Dec 12, 2005 page lx of lxxii