SH7727 Datasheet, PDF(553/1109 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

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SH7727 Datasheet, PDF (553/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

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Section 17 Serial Communication Interface (SCI)

Section 17 Serial Communication Interface (SCI)

17.1 Overview

This LSI has an on-chip serial communication interface (SCI) that supports both asynchronous and

clock synchronous serial communication. It also has a multiprocessor communication function for

serial communication among two or more processors. The SCI supports a smart card interface,

which is a serial communications feature for IC card interfaces that conforms to the ISO/IEC

standard 7816-3 for identification cards data transmission protocol type T = 0. See section 18,

Smart Card Interface, for more information.

17.1.1 Features

Select asynchronous or clock synchronous as the serial communications mode.

â¢ Asynchronous mode:

ï£§ Serial data communications are synched by start-stop in character units. The SCI can

communicate with a universal asynchronous receiver/transmitter (UART), an asynchronous

communication interface adapter (ACIA), or any other communications chip that employs

a standard asynchronous serial system. It can also communicate with two or more other

processors using the multiprocessor communication function. There are 12 selectable serial

data communication formats.

ï£§ Data length: Seven or eight bits

ï£§ Stop bit length: One or two bits

ï£§ Parity: Even, odd, or none

ï£§ Multiprocessor bit: 1 or 0

ï£§ Receive error detection: Parity, overrun, and framing errors

ï£§ Break detection: By reading the RxD level directly from the port SC data register

(SCSPTR) when a framing error occurs

â¢ Clock synchronous mode:

ï£§ Serial data communication is synchronized with a clock signal. The SCI can communicate

with other chips having a clock synchronous communication function. There is one serial

data communication format.

ï£§ Data length: Eight bits

ï£§ Receive error detection: Overrun errors

â¢ Full duplex communication: The transmitting and receiving sections are independent, so the

SCI can transmit and receive simultaneously. Both sections use double buffering, so

continuous data transfer is possible in both the transmit and receive directions.

Rev. 5.00 Dec 12, 2005 page 481 of 1034

REJ09B0254-0500

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