SH7727 Datasheet, PDF (732/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 21 Analog Front End Interface (AFEIF)
21.2 Register Description
21.2.1 AFEIF Control Register 1 and 2 (ACTR1, ACTR2)
ACTR is the control register for AFEIF and is composed of ACTR1 and ACTR2. ACTR1 is
mainly used for FIFO control commands. ACTR2 is used for AFE control commands and DAA
control commands.
(1) AFEIF Control Register 1 (ACTR1)
Bit: 15
14
13
12
11
10
9
8
HC
—
—
—
—
—
—
—
Initial value:
0
0
0
0
0
0
0
0
R/W: R/W
R
R
R
R
R
R
R
Bit:
7
6
DLB
—
Initial value:
0
0
R/W: R/W
R
5
4
3
2
1
0
—
FFSZ2 FFSZ1 FFSZ0
TE
RE
0
0
0
0
0
0
R
R/W
R/W
R/W
R/W
R/W
Bits 14 to 8, 6, and 5—Reserved
Bit 15—AFE Hardware Control Bit (HC): This bit controls AFE. AFE_HC1 signal is made to
high directly often the next serial transmit data transfer, when this bit is written to 1. Then ACDR
data (AFE control word) is transferred by founding the second AFE.FS. AFEIF module
automatically makes AFE_HC1 signal to low and HC bit to 0, directly after transferring the AFE
control word. See section 21.3.2, AFE Interface for more detail about AFE control sequences.
Bit 7—FIFO Digital Loop Back (DLB)
Bit 7: DLB
0
1
Description
Normal operation
(Initial value)
Digital loop back between Tx FIFO and Rx FIFO is performed. In this time the
transmit data is output to AFE_TXOUT, too.
Rev. 5.00 Dec 12, 2005 page 660 of 1034
REJ09B0254-0500