SH7727 Datasheet, PDF (155/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 2 CPU
Table 2.27 Double Data Transfer Instructions
Instruction
X memory NOPX
data transfer _{MOVX.W @Ax,Dx}
Instruction Code
1111000*0*0*00**
111100A*D*0*01**
MOVX.W @Ax+,Dx 111100A*D*0*10**
MOVX.W @Ax+Ix,Dx 111100A*D*0*11**
MOVX.W Da,@Ax
MOVX.W Da,@Ax+
111100A*D*1*01**
111100A*D*1*10**
MOVX.W Da,@Ax+Ix 111100A*D*1*11**
Y memory NOPY
data transfer _{MOVY.W @Ay,Dy}
111100*0*0*0**00
111100*A*D*0**01
MOVY.W @Ay+,Dy 111100*A*D*0**10
MOVY.W @Ay+Iy,Dy 111100*A*D*0**11
MOVY.W Da,@Ay
MOVY.W Da,@Ay+
111100*A*D*1**01
111100*A*D*1**10
MOVY.W Da,@Ay+Iy 111100*A*D*1**11
Operation
X memory no access
(Ax) → MSW of Dx,
0 → LSW of Dx
(Ax) → MSW of Dx,
0 → LSW of Dx,
Ax + 2 → Ax
(Ax) → MSW of Dx,
0 → LSW of Dx,
Ax + Ix → Ax
MSW of Da → (Ax)
MSW of Da → (Ax),
Ax + 2 → Ax
MSW of Da → (Ax),
Ax + Ix → Ax
Y memory no access
(Ay) → MSW of Dy,
0 → LSW of Dy
(Ay) → MSW of Dy,
0 → LSW of Dy,
Ay + 2 → Ay
(Ay) → MSW of Dy,
0 → LSW of Dy,
Ay + Iy → Ay
MSW of Da → (Ay)
MSW of Da → (Ay),
Ay + 2 → Ay
MSW of Da → (Ay),
Ay + Iy → Ay
Execu-
tion
States DC
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
Rev. 5.00 Dec 12, 2005 page 83 of 1034
REJ09B0254-0500