SH7727 Datasheet, PDF (715/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 20 Serial IO (SIOF)
(3) Transmitting in Slave
Figure 20.11 shows an example of transmitting and operation in slave.
No.
Time chart
Start
Settting of SIMDR register,
1 _{SIMCR register, SITDAR register,}
SIRDAR register, SICDAR register,
SIFCTR register
2 "1" is set to TXE bit of SICTR register
Setting content of SIOF
SIOF operation
Setting of operation mode,
serial clock, slot position of
transmit or receive data,
slot position of control data
and limit of FIFO request
Set transmit enable
Disable to transmit when
frame synchronized
transmit submit the
transmit request
N
3
TDREQ = 1?
Y
4 Setting of SITDR register
Set the transmit data
Synchronized to SIOFSYNC send content
5 _{of SITDR from TXD_SIO}
Transmit
N
Finish to transmit?
6
Y
"0" is set to TXE bit of SICTR register
Set to transit disable
Finish to transmit
End
Figure 20.11 Example of Transmit Operation in Slave
Rev. 5.00 Dec 12, 2005 page 643 of 1034
REJ09B0254-0500