SH7727 Datasheet, PDF (740/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 21 Analog Front End Interface (AFEIF)
Bit 8—Ringing Detect Mask (RDETM)
Bit 8: RDETM
0
1
Description
Ringing interrupt enable
Ringing interrupt mask
(Initial value)
Bit 1—Dial Pulse End (DPE)
Bit 1: DPE
0
1
Description
Normal state
Dial pulse end interrupt
(Initial value)
Set condition:
1. Output of all of dial pulse sequences completed or end command 0H detected
2. Illegal end (unspecified dial number and DPST set when RLYC bit (ACTR2) is low level)
Clear condition:
1. Reset
2. Interrupt status 1 is read and then 0 is written to this bit.
Bit 0—Ringing Detect (RDET)
Bit 0: RDET
0
1
Description
Normal state
Ringing waveform detect
(Initial value)
Set condition:
1. Ringing waveform is input to AFE_RDET pin (Latched at rising edge)
Clear condition:
1. Reset
2. Interrupt status 1 is read and then 0 is written to this bit.
Rev. 5.00 Dec 12, 2005 page 668 of 1034
REJ09B0254-0500