SH7727 Datasheet, PDF (167/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 2 CPU
Conditional Operations and Data Transfer: Some instructions belonging to this class can be
executed conditionally, as described earlier. The specified condition is valid only for the B field of
the instruction, and is not valid for data transfer instructions for which a parallel specification is
made. Examples are shown in figure 2.17.
DCT PADD X0,Y0,A0 MOVX.W @R4+,X0 MOVY.W A0,@R6+R9 ;
When condition is True
Before execution: X0=H'33333333, Y0=H'55555555, A0=H'123456789A,
R4=H'00008000, R6=H'00008233, R9=H'00000004
(R4)=H'1111, (R6)=H'2222
After execution: X0=H'11110000, Y0=H'55555555, A0=H'0088888888,
R4=H'00008002, R6=H'00008237, R9=H'00000004
(R4)=H'1111, (R6)=H'3456
When condition is False
Before execution: X0=H'33333333, Y0=H'55555555, A0=H'123456789A,
R4=H'00008000, R6=H'00008233, R9=H'00000004
(R4)=H'1111, (R6)=H'2222
After execution: X0=H'11110000, Y0=H'55555555, A0=H'123456789A,
R4=H'00008002, R6=H'00008237, R9=H'00000004
(R4)=H'1111, (R6)=H'3456
Figure 2.17 Examples of Conditional Operations and Data Transfer Instructions
Assignment of NOPX and NOPY Instruction Codes: When there is no data transfer instruction
to be parallel-processed simultaneously with a DSP operation instruction, an NOPX or NOPY
instruction can be written as the data transfer instruction, or the instruction can be omitted. The
instruction code is the same whether an NOPX or NOPY instruction is written or the instruction is
omitted. Examples of NOPX and NOPY instruction codes are shown in table 2.34.
Rev. 5.00 Dec 12, 2005 page 95 of 1034
REJ09B0254-0500