SH7727 Datasheet, PDF (65/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Tables
Section 1 Overview and Pin Functions
Table 1.1 SH7727 Features .................................................................................................... 2
Table 1.2 SH7727 Pin Function ............................................................................................. 11
Section 2 CPU
Table 2.1 Initial Register Values ............................................................................................ 24
Table 2.2 Detail Behavior Under Each SH3-DSP Mode........................................................ 33
Table 2.3 Destination Register of DSP Instructions............................................................... 34
Table 2.4 Source Register of DSP Operations ....................................................................... 35
Table 2.5 DSR Register Bits .................................................................................................. 36
Table 2.6 Word Data Sign Extension ..................................................................................... 41
Table 2.7 Delayed Branch Instructions .................................................................................. 41
Table 2.8 T Bit ....................................................................................................................... 42
Table 2.9 Immediate Data Referencing.................................................................................. 42
Table 2.10 Absolute Address Referencing ............................................................................... 43
Table 2.11 Displacement Referencing...................................................................................... 43
Table 2.12 Addressing Modes and Effective Addresses for CPU Instructions ........................ 44
Table 2.13 Overview of Data Transfer Instructions ................................................................. 48
Table 2.14 CPU Instruction Formats........................................................................................ 55
Table 2.15 Double Data Transfer Instruction Formats ............................................................. 59
Table 2.16 Single Data Transfer Instruction Formats .............................................................. 60
Table 2.17 A-Field Parallel Data Transfer Instructions............................................................ 61
Table 2.18 B-Field ALU Operation Instructions and Multiply Instructions............................. 62
Table 2.19 CPU Instruction Types ........................................................................................... 65
Table 2.20 Data Transfer Instructions ...................................................................................... 69
Table 2.21 Arithmetic Operation Instructions .......................................................................... 71
Table 2.22 Logic Operation Instructions.................................................................................. 73
Table 2.23 Shift Instructions .................................................................................................... 74
Table 2.24 Branch Instructions................................................................................................. 75
Table 2.25 System Control Instructions ................................................................................... 76
Table 2.26 Added CPU System Control Instructions............................................................... 81
Table 2.27 Double Data Transfer Instructions ......................................................................... 83
Table 2.28 Single Data Transfer Instructions........................................................................... 84
Table 2.29 Correspondence between DSP Data Transfer Operands and Registers.................. 85
Table 2.30 DSP Operation Instruction Formats ....................................................................... 86
Table 2.31 Correspondence between DSP Instruction Operands and Registers....................... 87
Table 2.32 DSP Operation Instructions.................................................................................... 88
Table 2.33 DC Bit Update Definitions ..................................................................................... 94
Rev. 5.00 Dec 12, 2005 page lxv of lxxii